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Publications |
Goutis C.E., Birbas M.K., Kyriakis-Bitzaros E.D. and Soudris D.J., "Rule-Based Mapping of Iterative Primitives on Their Architectures", CAVE Workshop, Beligrate, Milano, Italy, December 1988.
Koufopavlou O.G., Goutis C.E., Nikolaidis S.S. and Vallidras K., "Integrated Circuits to Control PWM-Power Inverters", presented in two-day conference of Technical Chamber of Greece "Power Electronics, Production-Application-Education", February 1989, Athens, Greece.
Mourjopoulos J.N., Kyriakis-Bitzaros E.D. and Goutis C.E., "Theory and Real-Time Implementation of Time Varying Digital Audio Filters", 86th AES Convention, preprint 2773(R-S), March 1989, Hamburg, Germany.
Stouraitis T., Skavantzos A., "Complex multiplication Using the Polynomial Residue Number System", Advances in Computers and Control, Spinger-Verlag, pp.61-70, 1989.
Birbas M.K., Soudris D.J., "Mapping Nested Iterations with Identical Iteration and Variable Indices", ASCIS 3281 (ESPRIT II) Report PU/M12/C2/1, May 1990.
Kyriakis-Bitzaros E.D., ASCIS 3281 (ESPRIT II) Report PU/M12/C2/2, Patras, 1990.
Kyriakis-Bitzaros E.D., Goutis C.E., "An Efficient Decomposition Technique for Mapping Uniform Recurences onto Regular Array Processors", Int. Workshop on Algorithms and Parallel VLSI Architectures, June 1990, France, Part B, pp. 94-100.
Birbas M.K., Soudris D.J, and Goutis C.E., "A New Method for Mapping Iterative Algorithms on Regular Arrays", Proceedings of Bilkent International Conference on New Trends on Communications, Control and Signal Processing, Vol. II, pp. 1121-1127, Ankara, Turkey, July 1990.
Mourjopoulos J.N., Kyriakis-Bitzaros E.D., "Theory and Real-Time Implementation of Time-Varying Digital Audio Filters", Journal of AES, Vol. 38, No. 718, July-August 1990, pp. 523-536.
Birbas M.K., Soudris D.J. and Goutis C.E., "A New Method for Mapping Matrix Computation Algorithms on Regular Processor Arrays", PARCELLA'91, International Workshop on Parallel Processing by Cellular Automata and Arrays, Berlin, Germany, 17-21, 1990.
Metafas D.E. and Goutis C.E., "A DSP Processor with a Powerful Set of Elementary Arithmetic Operations Based on CORDIC and CCM Algorithms", Journal of Microprocessing and Microprogramming 30, 1990, pp. 51-58.
Birbas M.K., Soudris D.J. and Goutis C.E., "Modelling and Direct Mapping of Iterative Algorithms on Regular Processor Arrays", Proceedings of International Workshop on Algorithms and Parallel VLSI Architecture, Vol. II, pp. 83-88, Pont-a-Mousson, France, 1990.
Kyrloglou N.A., Koufopavlou O.G. and Goutis C.E., "A Generator for a Number Format Conversions IC", Journal of Microprocessing and Microprogramming 30, 1990, pp.237-240.
Soudris D.J., Poechmueller P., Kyriakis-Bitzaros E.D., Birbas M.K., Goutis C.E., Glessner M., "Design Methodology for Systematic Derivation of Fault-Tolerant Array Processors", presented in CompEuro'90.
Kyrloglou N.A., Koutroubinas S., Kogiadis A., and Goutis C.E., "Artificial Inteligence and Integrated Circuits Design", Third Panhellenic Conference on Informatics, Athens, May 1991 (In Greek).
Soudris D.J., Birbas M.K., "On Operator with Non-Constant Dependencies", Deliverable Report ASCIS 3281 (ESPRIT II) PU/M24/C2/3, May 1991.
Soudris D.J., Birbas M.K., Goutis C.E., "Design Methodology for Mapping Iterative Algorithms on Piecewise Regular Processor Arrays", Proceedings of CompEuro'91, pp.373-377, Bologna, Italy, May 13-16, 1991.
Soudris D.J., Birbas M.K. and Goutis C.E., "Design Methodology for Mapping of Nested Loops on Array Architectures", CAVE Workshop, Agia Pelaghia, Heraklion, Greece, May 22-24, 1991.
Horianopoulos S.L., Metafas D.E., Goutis C.E. and Deliyannis T., "A Delta Modulation FIR Filter High Level Synthesis Tool", CAVE Workshop, Agia Pelaghia, Heraklion, Greece, May 22-24, 1991.
Nikolaidis S.S., Koufopavlou O.G., Theodoridis S. and Goutis C.E., "An Array Processor for LS FIR System Identification", Proceedings of EUROMICRO'91, Vienna, Austria, pp.557-564 and Microprocessing and Microprogramming 32, 1991, pp. 557-564.
Birbas M.K., Kyriakis-Bitzaros E.D., Soudris D.J. and Goutis C.E., "Direct Mapping of Nested Loops and Efficient Decomposition on Uniform Recurrences for Implementation on Array Architectures", Algorithms and Parallel VLSI Architectures, Editor Deprettere, North-Holland, 1991, pp.343-352.
Soudris D.J., Birbas M.K., Koufopavlou O.G., Metafas D.E., Nikolaidis S.S., Goutis C.E. and Theodoridis S., "All-Digital Spectrum Analyzer Based on a Parallel Algorithm", Proceedings of IEEE MELECON'91, Ljubljana, Jugoslavia, May 22-24, 1991, pp. 408-411.
Soudris D.J., Birbas M.K. and Goutis C.E., "Direct Mapping of Nested Loops on Piecewise Regular Processor Arrays", Proceedings of International Workshop on Algorithms and Parallel VLSI Architectures II, Chateau de Bonas, France, June 3-6, 1991, pp. 145-150.
Birbas M.K., Soudris D.J. and Goutis C.E., "Design Methodology for Mapping Iterative Algorithms on Array Architectures", Proceedings of ISCAS, Singapore, June 1-14, 1991, pp. 3058-3061.
Tsopanoglou A., Kyriakis-Bitzaros E.D., Mourjopoulos J.N. and Kokkinakis G., "A Real-Time Speech Decoder Using Instantaneous Frequency and Energy", presented in EuroSpeech 1991, Italy.
Kyriakis-Bitzaros E.D. and Goutis C.E., "A New Partitioning Method for Mapping Uniform Recurrences into Fixed Size Processor Arrays", Proceedings of the Fourth ISMM International Conference on Parallel and Distributed Computing and Systems, 1991, USA, pp. 39-40.
Horianopoulos S.L., Metafas D.E., Goutis C.E. and Deliyannis T., "A Delta Modulation FIR Filter High Level Synthesis Tool", Proceedings of the Fourth ISMM International Conference on Parallel and Distributed Computing and Systems, 1991, USA, pp. 95-99.
Metafas D.E., Krikis G. and Goutis C.E., "VLSI Design of an 8-Bit Fixed-Point CORDIC Processor with Extended Operation Set", Proceedings of EURO ASIC'91, Paris, May 27-1, 1991, pp. 158-161.
Metafas D.E. and Goutis C.E., "A Floating Point Pipeline CORDIC Processor with Extended Operation Set", Proceedings of ISCAS'91, Singapore, June 11-14, 1991, pp. 3066-3069.
Nikolaidis S.S., Mourjopoulos J.N. and Goutis C.E., "A Processor Architecture for Time-Varying Digital Audio Filters", presented in the International Conference on DSP Applications and Technology, October 1991, Berlin.
Koufopavlou O.G., Metafas D.E. and Goutis C.E., "Architectures and VLSI Module Generator for Expressing Digital Signals in Decibels", International Journal of Electronics, 1991, Vol. 71, No.2, pp. 297-307.
Soudris D.J., Birbas M.K., Goutis C.E.,"Mapping Iterative Algorithms on Regular Processor Arrays without Using Uniform Recurrent Equations", Journal of Microprocessing and Microprogramming 31, 1991, pp. 53-58.
Stouraitis T., Kim S., "New Implementations of Converters for the Residue and the Quadratic Residue Number Systems", Proceedings of the 1991 International Symposium on Circuits and Systems, Singapore, May 1991.
Stouraitis T., Skodras A., "Parallel Implementations of Inner Product Step Processors", Proceedings of the 1991 International Workshop on Parallel Computing, Trani, Italy, September 10-13, 1991, pp.32-35.
Koufopavlou O.G., Kyrloglou N.A., Goutis C.E., "A Parametric Area, Automated Adder/Subtractor VLSI Design", International Journal of Electronics, 1991, Vol. 70, No. 1, pp. 35-42.
Kyrloglou N.A., Koutroubinas S., Koyandis A., Goutis C.E., "A Placing and Routing Tool Implemented in Prolog", Journal of Microprocessing and Microprogramming 32 (1991), pp. 425-434.
Stouraitis T., Skavantzos A., "Multiplication of Complex Numbers Encoded as Polynomials", Journal of VLSI Signal Processing, Special Issue on Computer Arithmetic, Volume 3, pp. 319-328, 1991.
Horianopoulos S.L., Metafas D.E., Goutis C.E. and Deliyannis T., "A VLSI Synthesis Tool for Complementary Output Delta Modulation FIR Filters", Journal of Microprocessing and Microprogramming 34, 1992, pp. 139-142.
Kyriakis-Bitzaros E.D. and Goutis C.E., "An Efficient Decomposition Technique for Mapping Nested Loops with Constant Dependencies into Regular Processor Arrays", Journal of Parallel and Distributed Computing, 16, 1992, Academic Press, pp.258-264.
Kyrloglou N.A., Koufopavlou O.G. and Goutis C.E., "ASCARID: A Standard Cell Automated Design Rule Independent Module Generator Environment", Journal of Microcomputer Applications, 15, 1992, pp. 103-119.
Kyriakis-Bitzaros E.D. and Goutis C.E., "A Systematic Partitioning Method for Designing Fixed-Size Processor Arrays", Journal of Circuits, Systems and Computers, Vol. 2, No. 1, 1992, pp. 75-80.
Nikolaidis S.S., Mourjopoulos J.N., Goutis C.E., "A Processor for Time-Varying Digital Audio Filters with Special Transition Properties", 4th Euromicro Workshop on Real Time Systems, Athens, June 3-5, 1992, pp. 15-20.
Koufopavlou O.G. and Goutis C.E., "Image Reconstruction on a Special Purpose Array Processor", Image and Vision Computing, Vol. 10, No. 7, September 1992, pp. 479-484.
Soudris D.J., Paliouras V., Stouraitis T., "Systematic Development of Architectures for Multidimensional DSP Using the Residue Number System", IEEE Proceedings of ICASSP'92, pp.III-397-400.
Stouraitis T., Chen C., "Fast Digit Parallel Conversion of Signed-Digit into Conventional Representations", IEE Electronics Letters, Volume 27, No 11, 1992, pp. 964-965,.
Stouraitis T., Kim S.W., Skavantzos A., "Full-Adder Based Inner-Product Step Processors for Residue and Quadratic Residue Number Systems", Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, Chicago, IL, USA, May 3-6, 1992.
Paliouras V., Soudris D.J., Stouraitis T., "Systematic Derivation of the Processing Element of a Systolic Array Based on the Residue Number System", IEEE Proceedings of ISCAS'92, Vol. 2/6, pp.815-818.
Stouraitis T., Skavantzos A., "Decomposition of Complex Multipliers Using Polynomial Encoding", IEEE Transactions on Computers, Volume C-41, No 10, October 1992, pp. 1331-1333.
Stouraitis T., "Efficient Convertors for Residue and Quadratic Residue Number Systems", IEE Proceedings-G, Volume 139, No 6, 1992, pp. 626-634.
Koufopavlou O.G., Zitterbart M. ,"Parallel TCP for High Performance Communication Subsystems", IBM Research Report, RC 17872, March 1992.
Koufopavlou O.G., Tantawy A., Zitterbart M., "Analysis of TCP/IP for High Performance Parallel Implementations" ,Proceedings of the IEEE 17th Conference on Local Computer Networks (LCN'92), Minneapolis, Minnesota, USA, Sep. 13-16, 1992, pp. 576-585.
Koufopavlou O.G., Zitterbart M. "Parallel TCP for High Performance Communication Subsystems",Proceedings of the IEEE Global Telecommunications Conference (GLOBECOM'92), Orlando, Florida, USA, Dec. 6-9, 1992, pp. 1395-1399.
Abler J.M., Koufopavlou O.G. Tantawy A.N., Zitterbart M. , "High Performance IP Router", IBM Confidential Research Report, RC 18620, Dec. 1992.
Metafas D.E., Nikolaidis S.S., Goutis C.E., "Real Time Cepstrum Computation Based in an Advanced CORDIC Processor", Journal of Microprocessing and Microprogramming 37, 1993, pp. 57-60.
Metafas D.E., Mariatos E., Nicolaidis S.S.and Goutis C.E., "Implementaion of Given's Rotation Processors for DSP Real-Time Applications", presented in Euromicro '93 and Journal of Microprocessing and Microprogramming 38, 1993, pp 351-357.
Economou G.-P. K., Nikolaidis S.S., Metafas D.E., Goutis C.E., "Development of a Technology Independent Library", presented in Euromicro '93. and Journal of Microprocessing and Microprogramming 39,1993, pp. 241-244.
Bisdounis L., Metafas D.E., Maras A.M., Mavridis C., "VLSI Implementation of Digit-Serial Arithmetic Modules", Microprocessing and Microprogramming Journal, vol. 39, pp. 251-254, December 1993.
Nikolaidis S.S., Metafas D.E., Goutis C.E., "CORDIC Based Pipeline Architecture for All-Pass Filters", IEEE Proceedings of ISCAS'93, Vol. 3/4, pp.1917-1920.
Paliouras V., Soudris D.J., Stouraitis T., "Methodology for the Design of Signed-Digit DSP Processors", IEEE Proceedings of ISCAS'93, Vol. 3/4, pp. 1833-1836.
Soudris D.J., Paliouras V., Stouraitis T., Skavantzos A., Goutis C.E., "Systematic Design of Full Adder-Based Architectures for Convolution", IEEE Proceedings of ICASSP'93, Vol. I/V, pp.389-392.
Economou G.-P. K., Nikolaidis S., Metafas D.E., Goutis C.E., "Technology Independent Library For Fast Turn-Arround ASIC Design", Proceedings of 4th EUROCHIP Workshop in VLSI Design Training, Toledo, Spain, Sept.-Oct. 1993, pp. 356-361.
Kyriakis-Bitzaros E.D., Koufopavlou O.G. and Goutis C.E., "Space-Time Representation of Iterative Algorithms and the Design of Regular Processor Arrays", International Conference on Parallel Processing 1993, Vol.III, pp. 2-9.
Soudris D.J., Kyriakis-Bitzaros E.D., Paliouras V.R., Birbas M.K., Stouraitis T. and Goutis C.E., "On the Design of Two-Level Pipelined Processor Arrays", in Application Driven Architecture Synthesis, (eds) F.Catthoor and L.Svensson, Kluwer Academic Publishers, 1993, Ch.5, pp. 95-116.
Dre C., Tatsaki A., Stouraitis T., Goutis C.E., "A Novel Prime Factor Algorithm for the 1-D and 2-D Discrete Cosine Transform", Proceedings of ECCTD'93 - Circuit Theory and Design, Davos, August 1993, pp. 797-802.
Stouraitis T., Kim S., Skavantzos A., "Full Adder-Based Arithmetic Units for Finite Integer Rings", IEEE Transactions on Circuits and Systems, Volume 40, No 11, November 1993, pp. 740-745.
Stouraitis T., Chen C., "Hybrid Signed-Digit/Logarithmic Number System Processor", IEE Proceedings-E, Volume 140, No 4, 1993, pp. 205-210.
Stouraitis T., Skavantzos A., "Polynomial Residue Complex Signal Processing", IEEE Transactions on Circuits and Systems, Volume 40, No 5, 1993, pp. 342-344.
Stouraitis T., Skodras A., "A Fast Cosine Pruning Algorithm", Proceedings of the International Conference on Digital Signal Processing and International Conference on Computer Applications to Engineering Systems (ICCAES), Cyprus, July 14-16, 1993.
Abler J.M., Koufopavlou O.G., Tantawy A.N., Zitterbart M., "A Memory Organization Scheme for the Implementation of Routing Tables in High Performance IP Routers" ,IBM Technical Disclosure Bulletin, YO892-0816, Vol. 36, No 2, Feb. 1993, pp. 151-154.
Abler J.M., Koufopavlou O.G., Tantawy A.N., Zitterbart M. , "A Buffer Management Scheme for Gigabit IP Routers" ,IBM Technical Disclosure Bulletin, YO892-0817, Vol. 36, No 2, Feb. 1993, pp. 67-70.
Koufopavlou, O.G., "Parallel TCP", Gigabit TCP Workshop, Invited Speaker CNRI, Reston, Virginia, USA, March 18-19, 1993.
Kyriakis-Bitzaros E.D., Koufopavlou O.G., Goutis, C.E. , "Space-Time Representation of Iterative Algorithms and the Design of Regular Processor Arrays", IBM Research Report, RC 19000, May 1993.
Koufopavlou O.G., Tantawy A.N., Zitterbart M., "An ATM Communication Workstation", IBM Research Report, RC 19007, May 1993.
Koufopavlou O.G., Tantawy A.N., Zitterbart M. , "An ATM Communication Workstation", Proceedings of the Second International Conference on Broadband Islands, Athens, Greece, June 14-16, 1993.
Koufopavlou O.G., Tantawy A.N., Zitterbart M. "Normalized Multiprotocol Packet Processor", IBM Technical Disclosure Bulletin, YO893-0019, Vol. 36, No 7, July 1993, pp. 225-226.
Tantawy A.N., Koufopavlou O.G., Zitterbart M., Abler, J.M., "On the Design of a Multigigabit IP Router" ,IBM Research Report, RC 19183, July 1993.
Koufopavlou O.G., Tantawy A.N., Zitterbart M. , "Packet Processing in Multiprotocol Gigabit Routers", IBM Research Report, RC 19184, July 1993.
Kyriakis-Bitzaros E.D., Koufopavlou O.G., Goutis C.E. , "Space-Time Representation of Iterative Algorithms and the Design of Regular Processor Arrays", Proceedings of the International Conference on Parallel Processing, St. Charles, Illinois, USA, August 16-20 1993, Volume III, pp. 2-9.
Tantawy A.N., Koufopavlou O.G., Zitterbart M., AblerJ.M. "On the Design of a Gigabit Router", Second IEEE Workshop on the Architecture and Implementation High Performance Communication Subsystems (HPCS'93), Williamsburg, Virginia, September 1-3, 1993.
Karayiannis Y.A., Stouraitis T., "Fault Classification of Fabrics Based on Statistical Measures", First Internal Workshop on Efficient Texture Analysis: Advanced Meds, Applications, Patras, Greece, 13-15 December, 1993.
Koufopavlou O.G., Tantawy A.N., Zitterbart M. ,"IP-Routing among Gigabit Networks", Proceedings of the Second International Symposium on Interworking, Sofia Antipolis, France, May 4-6, 1994.
Karagianni K., Kyriakis-Bitzaros E.D. and Stouraitis T., "Mapping Iterative Algorithms onto Processor Arrays by the Use of Petri Net Models", IEEE International Conference on Massively Parallel Computing Systems, May 2-6, 1994, Ischia, Italy, pp.140-151.
Koufopavlou O.G., Tantawy A.N., Zitterbart M., "A Comparison of Gigabit Router Architectures", Proceedings of the 5th IFIP Conference on High Performance Networking, Grenoble, France, June 27 - July 1, 1994.
Tantawy A.N., Koufopavlou O.G., Zitterbart M., Abler J.M. , "On the Design of a Multigigabit IP Router", Journal of High Speed Networks, vol. 1994, no. 3, pp 1-24.
Hallas J.A., Birbas M.K., Kikidis J.C., Birbas A.N., Goutis C.E., "Near-Lossless Compression of Continuous-Tone Still Images Using Fuzzy Logic notions and the Binary Arithmetic Coder (Q-Coder)", Proceedings of ISCAS'94, London, UK, Vol. 3'6, pp. 125-128
Mariatos E., Metafas D.E., Hallas J.A., Goutis C.E., "A Fast D.C.T. Processor, Based on Special Purpose CORDIC Rotators", Proceedings of ISCAS'94, London, UK, Vol. 4/6, 271-274.
Paliouras V., Stouraitis T., "Systematic Design of Multimodulus/multi-function Residue Number System Processors", Proceedings of ISCAS'94, London, pp. 4.79-4.82.
Hallas J.A., Mariatos E.P., Birbas M.K., Birbas A.N., Goutis C.E., "A CAD tool for the development of an Extra-Fast Fuzzy Logic Controller based on FPGAs and memory modules", Proceedings of FPL'94, Prague, Chech Republique.
Mariatos E., Hallas J.A., "Translator 2", Fifth EUROCHIP Workshop on VLSI Design Training, 1994, Dresden, Germany.
Economou G.-P.K., Anagnostopoulos G.C. and Goutis C.E., "Experiences Accumulated by the Simulation of an Application Specific Analog Integrated Circuit", 5th Eurochip Workshop on VLSI Design Training, Dresden, Germany, October 1994, pp. 406-411.
Tatsaki A., Stouraitis T., and Goutis C.E., "An Efficient Pyramid VQbased Image Compression Algorithm", IEEE Data Compression Conference (DCC'94), , Snowbird Utah, March 1994, pp.479.
Dre C., Gianopoulou S., Goutis C.E., "A Fast Algorithm for Vector Quantization Codebook Generation", presented at SPIE VCIP'94, September 1994, Chicago USA, vol. SPIE 2308, pp. 199208.
Tatsaki A. and Goutis C.E., "A BitSerial VLSI Architecture for the 2D Discrete Cosine Transform", presented at Euromicro'94, Liverpool, England, 1994 and Journal of Microprocessing and Microprogramming, North-Holland, vol. 40, pp. 829-832, 1994.
Dre C., Branis G., Goutis C.E., "Image Compression using Vector Quantization of Wavelet Coefficients", presented at Euromicro'94, 49 September 1994, Liverpool, England and Journal of Microprocessing and Microprogramming , North-Holland, Vol. 40, pp. 927-930, 1994.
Merakos P.K., Mariatos E.P., Birbas M.K., Birbas A.N., Frantzeskakis E., Karathanasis H., "Efficient Mappinmg of Cepstrum Algorithms on a Reconfigurable CORDIC System", 20th Euromicro Conference: System Architecture and Integration, Liverpool, England, September 1994, pp. 597-602.
Mariatos E.P., Merakos P.K., Birbas M.K., Birbas A.N., "Hardware Programming Using C++", 20th Euromicro Conference: System Architecture and Integration, Liverpool, U.K., September 1994.
Economou G.-P. K., Anagnostopoulos G.C., Theofilou D.T., Stouraitis T. and Goutis C.E., "Non-Linear Optimization: Artificial Neural Network Solution Techniques Applied to the Optimum Linear Feedback Control of Linear Discrete-Time Dynamic Systems", 20th Euromicro Conference: System Architecture and Integration, Liverpool, U.K., September 1994, pp. 637-643.
Economou G.-P.K., Spiropoulos C., Economopoulos N.M., Charokopos N., Lymberopoulos D., Spiliopoulou M., Haralambopoulou C. and Goutis C.E., "Medical Diagnosis and Artificial Neural Networks: A Medical Expert System Applied to Pulmonary Diseases", 1994 IEEE International Workshop on Neural Networks for Signal Processing, Ermioni, Greece, September 1994, pp. 482-489.
Economou G.-P.K., Mariatos E.P., Economopoulos N.M., Lymberopoulos D., and Goutis C.E., "FPGA Implementation of Artificial Neural Networks: An Application on Medical Expert Systems", 4th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, Torino, Italy, September 1994, pp. 287-293.
Economou G.-P.K., Spiropoulos C., Economopoulos N.M., Charocopos N., Lymberopoulos D., Spiliopoulou M., Haralambopulu C. and Goutis C.E., "Medical Decision Making Systems in Pulmonology: A Creative Environment based on Artificial Neural Networks", 1994 IEEE Conference on Systems, Man and Cybernetics: Humans, Information and Technology, San Antonio, USA, October 1994, pp. 975-980.
Economou G.-P.K., Economopoulos N.M., Charokopos N., Zikos P., Lymberopoulos D., Spiropoulos C. and Goutis C.E., "Decision Supporting Systems in Medical Diseases' Diagnosis: An Artificial Neural Networks Approach", 1994 Annual Fall Meeting of the Biomedical Society, Tempe, Arizona, 14-16/10/1994.
Karayiannis Y.A., Stouraitis T., Economou G.-P.K. and Economopoulos N.M., "Texture Classification by Measuring the Fractal Dimension Vector in a Wavelet Decomposed Image", 8th Symposium on Microcomputer and Microprocessor Applications, Budapest, Hungary, October 1994, pp. 151-158.
Economou G.-P.K., Economopoulos N.M., Charokopos N., Zikos P., Lymberopoulos D., Spiropoulos C. and Goutis C.E., "Suggesting Diagnosis of Diseases and Treatment: How Far Artificial Neural Networks Can Go?", Tainan, Taiwan, 15-17/12/1994.
Paliouras V., Orginos I. and Stouraitis T., "Multi-operand Logarithmic Number System Adders and Subtractors Based on Plynomials Approximation" Proceedings of ICECS'94, Cairo, Egypt.
Tatsaki A., Dre C., Stouraitis T. and Goutis C.E., "Prime Factor DCT Algorithms", IEEE Transactions on Signal Processing, vol. 43, no.3, pp. 772-773, March 1995.
Tatsaki A., Dre C., Stouraitis T., and Goutis C.E., "On the Computation of the prime factor 1D discrete sine transform" Journal Signal Processing, NorthHolland Publications, vol 42, No. 3, pp. 231-236, 1995.
Tatsaki A., Burekas B., and Goutis C.E., "An Efficient BitSerial VLSI Implementation of the 4x4point Discrete Cosine Transform", International Journal of Electronics. Vol. 77, No.2, pp. 259-267, 1994.
Tatsaki A., Stouraitis T., and Goutis C.E., "A Progressive Image Compression Scheme based on Lattice Vector Quantization", presented in EUROPTO, The European Symposium on Advanced Networks and Services, Compression Technologies and Standards for Image and Video Communications, Amsterdam, March 1995.
Dre C. and Goutis C.E., "An Efficient AddressVectorQuantization based Image Coding Scheme", presented in EUROPTO, The European Symposium on Advanced Networks and Services, Compression Technologies and Standards for Image and Video Communications, Amsterdam, March 1995.
Economou G.-P., Hallas J.A., Mariatos E. and Goutis, C. E., "Artificial Neural Networks in Medical Decision Making Systems: An Application to Pulmonary Diseases Diagnosis through VHDL Synthesis", accepted for presentation in the European Design and Test Conference, Paris, France, 6-9/3/1995.
Kyriakis-Bitzaros E.D., Soudris D.J. and Goutis C.E., "Transformation of Nested Loops into Uniform Recurrences and Their Mappings to Regular Processor Arrays", accepted for publication in the Journal of Circuits, Systems and Computers, published by World Scientific.
Tatsaki A., Stouraitis T and Goutis C.E., "Image Coder Based on Residue Number System for Progressive Transmission", IEE Electronics Letters, , Vol. 31, No. 6, pp. 442-443, March 1995.
C. Dre, N. Alexopoulou, C.E. Goutis, "Multi-stage Address Vector Quantization," International Journal of Electronics, vol. 78, no. 5, May 1995.
C. Dre, A. T. Tatsaki, T. Stouraitis, C.E. Goutis, "Alternative Architectures for the 2-D DCT Algorithm," IEEE International Symposium on Circuits and Systems (ISCAS'95), pp. 2156-2159, March 1995.
C. Dre, G. Lafruit, T. Stouraitis, J. Cornelis and C.E. Goutis, "Chinese Remainder Theorembased Algorithm for Convolution," Proc. IEEE International Conference on Digital Signal Processing 1995, vol. 1, pp. 255-260, June 26-28, Cyprus 1995.
Metafas D.E. and Goutis C.E., "A Floating Point Advanced Cordic Processor", Journal of VLSI Signal Processing, Vol. 10, pp. 53-60, 1995.
Koufopavlou O.G., Tantawy A.N., Zitterbart M. , "A Scheme for High Performance Management of Empty Buffers", IBM Invention Disclosure, YO893-0167, submitted.
Blasi F., Brunheroto J.R., Koufopavlou O.G. , Lisboa, V., Nogima J., Serpanos D., "Intelligent HSSI Adapter" , IBM Invention Disclosure. YO893-0417, submitted.
Kyriakis-Bitzaros E.D.and Goutis C.E., "Space-Time Representationof Nested Loop Algorithms for the Design of Processor Arrays", under review for publication to IEEE Trans. on Computers.
Kyriakis-Bitzaros E.D., Soudris D.J. and Goutis C.E., "Transformation of Fortran-Like Nested Loops into Uniform Recurrences and Their Mapping to Regular Processor Arrays", under review for publication to Journal of Circuits Systems and Computers.
Kyrloglou N.A., Goutis C.E., "A `Staircase` Line Router", submitted for publication to the EUROMICRO Journal of Microprocessing and Microprogramming.
Nikolaidis S.S., Metafas D.E., Goutis C.E., "Normalized Lattice All-Pass Filters Based on CORDIC Processors", submitted for publication.
Nikolaidis S.S., Mourjopoulos J.N., Goutis C.E., "A Dedicated Processor for Time-Varying Digital Audio Filters", accepted for publication in IEEE Proceedings on Circuits and Systems.
Stouraitis T., "Analog and Binary-to-Residue Conversion Schemes", to appear in IEE Proceedings-G.
Stouraitis T.., "Replay a Fault-Tolerance Scheme for Wavefront Array Processors", to appear in IEEE Transactions on Computers.
Stouraitis T., "Performance Evaluation of BIN/ABIN Networks in Buffered/Unbuffered Packet-Switched Environments", to appear in IEE Proceedings-E.
Economou G.-P.K., Economopoulos N.M., Lymberopoulos D., Goutis C.E., "Experiences Accumuluted Working Towards Medical Decision Support Systems ", to appear on Journal of Microprocessing and Microprogramming.
Dre C., Tatsaki A., Stouraitis T., Goutis C.E., "On the Mapping of the 2-D prime factor DCT algorithm onto architectures," has been submitted for publication in Elsevier - INTEGRATION, the VLSI Journal.
Bisdounis L., Panagiotaras G., Koufopavlou O., Goutis C.E., "CMOS Multi-input Gate Implementations for Low-Power Digital Design", International Journal of Electronics, vol. 79, no. 5, pp. 641-653, November 1995.
Bisdounis L., Nikolaidis S., Koufopavlou O., Goutis C.E., "Modeling the CMOS Short-Circuit Power Dissipation", Proc. IEEE International Symposium on Circuits & Systems, vol. 4, pp. 469-472, May 1996.
Bisdounis L., Koufopavlou O., Nikolaidis S., "Accurate Evaluation of the CMOS Short-Circuit Power Dissipation for Short-Channel Devices", Proc. IEEE International Symposium on Low-Power Electronics and Design, pp. 189-192, August 1996.
Bisdounis L., Nikolaidis S., Koufopavlou O., "CMOS Short-Circuit Power Dissipation Including Velocity Saturation and Gate-to-Drain Capacitive Coupling", Proc. Sixth International Workshop on Power and Timing Modeling, Optimization and Simulation, pp. 157-166, September 1996.
Bisdounis L., Nikolaidis S., Koufopavlou O., Goutis C.E., "Accurate Timing Model for the CMOS Inverter", Proc. Third IEEE Internatonal Conference on Electronics, Circuits and Systems, vol. 1, pp. 89-92, October 1996.
K. Karagianni, D. J. Soudris, and T. Stouraitis, "A Petri Net Approach to the Design of Processor Array Architectures", 38th Midwest Symposium on Circuits and Systems, Rio De Janeiro, August 1995, Vol.1, pp.37-40.
K. Karagianni, T. Chronopoulos, N. Koussoulas, A. Tzes, and T. Stouraitis, "Efficient Implementation of the Generalized Predictive Control Algorithm", Proceedings of the 4th Mediterranean Symposium on New Directions in Control and Automation, June 10-13, Maleme, Krete, Greece, pp.534-539.
K. Masselos, K. Karagianni, Y. Karayiannis, and T. Stouraitis, "A
Parallel Image Compression scheme based on Fractal Coding and Vector Quantization",
in Proceedings of the Third International Conference on Electronics, Circuits,
and Systems (ICECS'96), Rodos, Greece, October 13-16, 1996.
E. Karagianni, G. Diamantakos, V. Paliouras, and T. Stouraitis, "An
Operation-Saving VLSI Geometry Engine Core", to be presented at International
Conference on Acoustics, Speech, and Signal Processing 1997 (ICASSP'97).
Masselos, P. M. Merakos, C. E. Goutis, "Binding of operations onto hardware resources for Low-Power High-Level Synthesis", in Proceedings of the Third International Conference on Electronics, Circuits, and Systems (ICECS'96), Rodos, Greece, October 13-16, 1996.
Theodoridis. G., Theoharis. S., Soudris. D., and Goutis. C., "A Novel Approach for Reducing the Switching Activity in Two Level Logic Circuits" , in Proceedings of the Third International Conference on Electronics, Circuits, and Systems (ICECS'96), Vol. 2, pp. 840-843, Rodos, Greece, October 13-16, 1996.
Theodoridis G., Theoharis S., Soudris D., and Goutis C., " A method for minimizing the Switching Activity of Two Level Logic Circuits" submitted for publication to IEE journal of Digital Techniques
Theoharis G. S., Theodoridis. G., Soudris. D., and Goutis. C., "Low Power Design of Two Level Logic Circuits" submitted for publication to Electronics Letters
Theodoridis. G., Theoharis. S., Soudris. D., and Goutis. C., "An Iterative Method for reducing the Switching Activity in Two Level Logic Circuits" submitted for publication to EUDAC-EUROVHDL '97
Masselos, P. M. Merakos, T. Stouraitis, C. E. Goutis, "Novel Codebook DesignTechniques for Vector Quantization Image Compression", accepted for publication in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) 1997.
A.Rjoub, V. Paliouras, T. Stouraitis, " A Full-Custom implementation of an RNS multiplier", in proceedings of the second International Conference on Electronics, Circuits, and Systems (ICECS '95), pp. 25-28, Amman, Jordan.
A. Rjoub S. Nikolaidis, O. Koufopavlou and T. Stouraitis," An Efficient-Low-Power Bus Architecture", Accepted for publication in Proceedings of IEEE International Symposium on Circuits and Systems(ISCAS) '97. Hong-Kong.
Bisdounis L., Nikolaidis S., Koufopavlou O.,"Delay evaluation of static CMOS gates for short-channel devices", Proc. Fourth IEEE Internatonal Conference on Electronics, Circuits and Systems (Cairo, Egypt), pp. 532-536, December 1997.
Rjoub A., Bisdounis L., Koufopavlou O.,"Influence of the nMOS and pMOS transistor threshold voltages on CMOS circuits power dissipation", Proc. Fourth IEEE Internatonal Conference on Electronics, Circuits and Systems (Cairo, Egypt), pp. 545-549, December 1997.
Bisdounis L., Nikolaidis S., Koufopavlou O., Goutis C.E."Switching response modeling of the CMOS inverter for sub-micron devices", Proc. IEEE Design, Automation and Test in Europe Conference (Paris, France), pp. 729-735, February 1998.
Bisdounis L., Koufopavlou O."Modeling the dynamic behavior of series-connected MOSFETs for delay analysis of multiple-input CMOS gates", Proc. IEEE Internatonal Conference on Circuits and Systems (Monterey, USA), pp. VI.532-VI.536, June 1998.
Bisdounis L., Nikolaidis S., Koufopavlou O.,"Analytical transient response and propagation delay evaluation of the CMOS inverter for short-channel devices", IEEE Journal of Solid-State Circuits, vol. 33, pp. 302-306, February 1998.
Bisdounis L., Nikolaidis S., Koufopavlou O.,"Propagation delay and short-circuit power dissipation modeling of the CMOS inverter", IEEE Transactions on Circuit and Systems - Part I, vol. 45, pp. 259-270, March 1998.
Bisdounis L., Nikolaidis S., Koufopavlou O.,"Analytical model for the CMOS short-circuit power dissipation", Integrated Computer-Aided Engineering Journal (special issue on low-power electronic systems), IOS Press, vol. 5, pp. 129-140, April 1998.
Bisdounis L., Koufopavlou O., Nikolaidis S.,"Modeling output waveform and propagation delay of a CMOS inverter in the submicron range", IEE Proceedings on Circuits, Devices and Systems, vol. 145, pp. 402-408, December 1998.
Bisdounis L., Gouvetas D., Koufopavlou O.,"A comparative study of CMOS circuit design styles for low-power high-speed VLSI circuits", International Journal of Electronics, Taylor & Francis, vol. 84, pp. 599-613, June 1998.