GENERAL INFORMATION ABOUT THE COURSE
A 2-day course on Memory Management For Embedded Systems will be offered by the VLSI Laboratory of the University of Patras in Greece, from April 1 to 2, 2004.
The course is intended for Engineers from Industry and Academia. Along
with the theory, practical sessions with laboratory exercises are included.
Lectures will be given by top experts from the Interuniversity Microelectronics Center (IMEC) and from the University of Patras. The prerequisite of the course is a basic knowledge of software engineering and computer architecture. The course will be taught in English. Each attendee will receive a certificate of attendance at the course.

CONTENTS
Preprocessing
It mainly prunes parts with less memory accesses allowing the designer to easily focus on the important parts of the application code for performing further refinements and optimizations.
Exploitation of Data Reuse
This optimization step takes into account all the addresses of data memory that are accessed frequently and aims at increasing the locality of them giving as an output the architecture of cache hierarchy.
Processor - Memory Bandwidth Optimization
Concerns the application of code transformations for the improvement of the memory bandwidth characteristics of the system’s memory architecture.
Physical Memory Management
A methodology for extracting the system’s Physical Memory Architecture and placing the application data in it, for system’s performance and low power.
Task Partitioning
Task partitioning methodology for running the above refined code to multiprocessor platforms.

LOCATION
The course will be held at the Department of Electrical and Computer Engineering (room ΗΛ1) of the University of Patras in Rio, Geece.

Course Schedules
Courses are schedule to begin at 9.00 am each day and Laboratory experimental work in the afternoon.

Registration
Registration fees (Euro): EUR 300
100%  discount for postgraduate students

Registration form, containing course registration, should be returned to the mailing address before the deadline for registration, March 15, 2004. Upon receipt of the course registration form, a letter of confirmation will be sent together with the invoice.

Hotel reservation:
    Port Rio Hotel          Tel:     +302610992102
                                            +302610992212
                                    Fax:    +302610992115
Hotel Tzaki                   Tel:    +302610453960-3
                                    Fax:     +302610426750
                                    web: www.hoteltzaki.gr

Payment of the fee should be reach the course organization by March 24, 2004. Nobody will be allowed to participate in the course unless their fees have been fully paid by indicated deadline!
Methods of payment can be either bank transfer, cheque, or cash at the arrival. this will be indicated also in the letter of confirmation. In case of cancellation, the fee will be refunded less 8% administration charge. For details please contact Niki Sarantoglou.

Deadlines:    Course Registration:    March 15, 2004
                      Payment due by:          March 24, 2004

Please register to:
    Niki Sarantoglou
    Department of Electrical & Computer Engineering
    University of Patras
    Rio 26110 Greece
    Tel: +302610997283
    Fax: +302610994798
    e-mail: sarant@ee.upatras.gr
    VLSI Web: www.vlsi.ee.upatras.gr/projects/easy/announcement.html

COURSE ORGANIZATION
This course is organized by the VLSI Laboratory of the Department of Electrical and Computer Engineering of the University of Patras , Greece.
Local Organizers:            Costas Goutis, University of Patras, Greece
                                          Athanasios Milidonis University of Patras, Greece


Course Schedule

Thursday, April 1
9:00-10:45    Preprocessing                                                     Costas Goutis
11:00-12:00 Exploration of Data Reuse                                    Costas Goutis
12:15-13:15 Processor – Memory Bandwidth Optimization      Francky Catthoor
15:00-17:30 Laboratory experiments on Preprocessing

Friday, April 2
9:00-10:45    Physical Memory Management                Francky Catthoor
11:00-12:00 Task Partitioning I                                    Costas Goutis
12:15-13:15 Task Partitioning II                                   Costas Goutis
15:00-17:30 Laboratory experiments on Data Reuse


REGISTRATION FORM
You can print the registration form found at the bottom of this page directly from your browser, or download it here.



























MEMORY MANAGEMENT FOR EMBEDDED SYSTEMS

REGISTRATION FORM

Please complete this form in printed letters and return it at the latest by             
 March 15, 2004
to Niki Sarantoglou    Department of Electrical & Computer Engineering University of Patras Rio 26110 Greece
Fax: +302610994798


Family Name:........................................    Mrs./Mr./Dr.......
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Please register me to the course on “Memory Management for Embedded Systems” (April 1-2)

Amount due: EUR 300 ◘        Postgraduate Student ◘



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